Protection of drain extended transistor field oxide

An integrated circuit (IC), comprising:

• a semiconductor substrate, including:
• a first side;
• and a second side spaced from the first side along a first direction;
• a first doped layer in the substrate, the first doped layer including majority carrier dopants of a first type;
• and
• a drain extended transistor, comprising:
• a body region that extends along the first direction into the semiconductor substrate, the body region including:
• majority carrier dopants of the first type;
• and a channel portion;
• a source region that extends along the first direction into the semiconductor substrate from the first side of the semiconductor substrate, the source region adjacent a first side of the channel portion of the body region, the source region including majority carrier dopants of a second type;
• an oxide structure that extends along the first side of the semiconductor substrate, the oxide structure including:
• a first end spaced along a second direction from the channel portion of the body region;
• and a second end;
• a drain region that extends along the first direction into the semiconductor substrate from the first side, the drain region including:
• majority carrier dopants of the second type, and a first end adjacent the second end of the oxide structure;
• a drift region, including majority carrier dopants of the second type, the drift region extending along the first direction into the semiconductor substrate from the first side and extending along the second direction from the channel portion of the body region to the drain region;
• a gate structure, including:
• a gate dielectric layer formed over the first side of the substrate;
• and a gate electrode on the gate dielectric layer;
• and
• a protection layer that extends on the oxide structure between the gate structure and the drain region, the protection layer including at least one of an oxide material, and a nitride material.

An integrated circuit (IC), comprising:

• a semiconductor substrate, including:
• a first side;
• and a second side spaced from the first side along a first direction;
• an isolation structure that laterally surrounds an active region of the semiconductor substrate, the isolation structure including a shallow trench isolation (STI) structure that defines an end of the active region of the semiconductor substrate;
• a first doped layer in the active region of the substrate, the first doped layer including majority carrier dopants of a first type;
• and
• a drain extended transistor, comprising:
• a body region that extends along the first direction into the semiconductor substrate, the body region including:
• majority carrier dopants of the first type;
• and a channel portion;
• a source region that extends along the first direction into the semiconductor substrate from the first side of the semiconductor substrate, the source region adjacent a first side (inner) of the channel portion of the body region, the source region including majority carrier dopants of a second type;
• an oxide structure that extends along the first side of the semiconductor substrate, the oxide structure including:
• a first end spaced along a second direction from the channel portion of the body region;
• and a second end;
• a drain region that extends along the first direction into the semiconductor substrate from the first side, the drain region including:
• majority carrier dopants of the second type, and a first end adjacent the second end of the oxide structure;
• a drift region, including majority carrier dopants of the second type, and extending along the second direction from the channel portion of the body region to the drain region;
• and
• a gate structure, including:
• a gate dielectric layer formed over the first side of the substrate;
• and a gate electrode on the gate dielectric layer;
• wherein the STI structure is laterally spaced from the oxide structure by a first distance along a third direction substantially perpendicular to the second direction.

A method to fabricate a drain extended transistor, the method comprising:

• providing a semiconductor substrate, including:
• a first side;
• a second side spaced from the first side along a first direction;
• and a first doped layer that includes majority carrier dopants of a first type;
• forming an oxide structure along the first side of the semiconductor substrate;
• performing at least one implantation process that implants dopants of the second type into the semiconductor substrate to form a drift region at least partially under the oxide structure;
• implanting dopants of the first type into the semiconductor substrate to form a body region having a channel portion adjacent the drift region;
• forming a gate structure over the channel portion of the body region and over a portion of the oxide structure;
• implanting dopants of the second type to form:
• a source region adjacent the channel portion of the body region;
• and a drain region adjacent the second drift region portion and the oxide structure;
• and
• forming a protection layer that extends on the oxide structure between the gate structure and the drain region, the protection layer including at least one of an oxide material, and a nitride material.