Manufacturing method of polysilicon semiconductor layer,thin film transistor and manufacturing method
AssigneeWuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
InventorMing-jen LU
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Abstract
A method for manufacturing a polysilicon semiconductor layer, a thin film transistor, and a manufacturing method are provided. The method for manufacturing a polysilicon semiconductor layer includes the following steps. A predetermined gas is dissociated, and a low amount of first ions and a high amount of second ions are screened out. A heavily doped region is doped with the second ions. A lightly doped region is doped with the first ions. Annealing is further performed, so that a polysilicon semiconductor layer is formed from an amorphous silicon layer.
Claims10
A method for manufacturing a polysilicon semiconductor layer, comprising:
- step S10, dissociating a predetermined gas containing ions for use in ion-implantation, and screening dissociated ions for implantation to obtain a low amount of first ions and a high amount of second ions;
- step S11, doping a heavily doped region of an amorphous silicon layer with the second ions;
- step S12, doping a lightly doped region of the amorphous silicon layer with the first ions;
- and
- step S13, annealing the amorphous silicon layer so that the polysilicon semiconductor layer is formed from the amorphous silicon layer doped with the first ions and the second ions.
A method for manufacturing a thin film transistor, comprising:
- step S20, providing a substrate and forming an amorphous silicon layer on the substrate, dissociating a predetermined gas, and screening dissociated ions for implantation to obtain a low amount of first ions and a high amount of second ions;
- step S21, doping a heavily doped region of an amorphous silicon layer with the second ions;
- step S22, doping a lightly doped region of the amorphous silicon layer with the first ions;
- step S23, annealing the amorphous silicon layer so that a polysilicon semiconductor layer with a source contact area and a drain contact area is formed from the amorphous silicon layer;
- step S24, forming a source and a drain at positions corresponding to the source contact area and the drain contact area, and electrically connecting the source and the drain with the source contact area and the drain contact area, respectively.
Dependencies are inferred from the claim text.