Channel layer for iii-v metal-oxide-semiconductor field effect transistors (mosfets)

A method for forming a semiconductor device, the method comprising:

• forming a precursor layer directly above and in contact with a surface of a substrate, wherein the precursor layer includes a precursor material with a group III element, and the surface of the substrate is substantially flat;
• forming a capping layer above the precursor layer;
• patterning the capping layer and the precursor layer to form a patterned precursor area covered by the capping layer, wherein the patterned precursor area is with an aspect ratio (x, y, z);
• annealing the patterned precursor area with a coreactant, wherein the coreactant includes a group V element, and the patterned precursor area is transformed to a patterned epitaxial layer directly in contact with the surface of the substrate to be a channel area including an III-V compound formed by the precursor material and the coreactant;
• removing the capping layer;
• forming a gate dielectric layer adjacent to the channel area and in direct contact with the channel area;
• and
• forming a gate electrode adjacent to the gate dielectric layer.

A computing device, comprising:

• a processor;
• and
• a memory device coupled to the processor, wherein the memory device or the processor includes a transistor comprising:
• a substrate with a surface that is substantially flat;
• a channel area above the substrate, wherein the channel area is an epitaxial layer directly in contact with the surface of the substrate, and the channel area includes an III-V compound;
• a gate dielectric layer adjacent to the channel area and in direct contact with the channel area;
• and
• a gate electrode adjacent to the gate dielectric layer.