Methods and apparatus for three-dimensional non-volatile memory

Apparatus comprising:

• a non-volatile memory cell disposed between a bit line and a word line, the non-volatile memory cell comprising:
• a reversible resistance-switching memory element coupled in series with an isolation element;
• and
• a capacitor coupled between the isolation element and the reversible resistance-switching memory element.

A method comprising:

• forming a non-volatile memory cell between the bit line and the word line, the non-volatile memory cell comprising a selector element coupled in series with a reversible resistance-switching memory element;
• and
• forming a capacitor between the selector element and the reversible resistance-switching memory element,
• wherein the capacitor has a value that substantially matches a parasitic capacitance of the bit line and the word line.