Semiconductor Device Packages, Packaging Methods, and Packaged Semiconductor Devices
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsJie Chen, Ying-Ju Chen, Hsien-Wei Chen
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Abstract
Semiconductor device packages, packaging methods, and packaged semiconductor devices are disclosed. In some embodiments, a package for a semiconductor device includes an integrated circuit die mounting region and a molding material disposed around the integrated circuit die mounting region. An interconnect structure is disposed over the molding material and the integrated circuit die mounting region. A protection pattern is disposed in a perimeter region of the package. The protection pattern includes a conductive feature.
Claims20
A semiconductor device comprising:
- a protection pattern located over an encapsulant;
- a dielectric material isolating the protection pattern, the dielectric material extending from over the encapsulant to over a semiconductor die;
- conductive redistribution elements within the dielectric material, the conductive redistribution elements electrically connecting the semiconductor die to an external connection;
- and
- a packaged semiconductor device connected to the external connection.
A semiconductor device comprising:
- a conductive redistribution layer extending over both a first semiconductor device and an encapsulant adjacent to the first semiconductor device;
- a protection pattern located over the encapsulant, the protection pattern comprising a second conductive material;
- dielectric material electrically isolating the protection pattern;
- and
- a package-on-package device electrically connected to the first semiconductor device through an external connection and the conductive redistribution layer.
A semiconductor device comprising:
- a semiconductor die encapsulated within an encapsulant;
- a plurality of first conductive layers overlying both the semiconductor die and the encapsulant;
- a plurality of second conductive layers overlying the encapsulant, wherein individual ones of the plurality of second conductive layers are aligned with respective ones of the plurality of first conductive layers;
- a dielectric material electrically isolating the plurality of first conductive layers from the plurality of second conductive layers;
- external connectors connected to the plurality of first conductive layers;
- a substrate bonded to the external connectors;
- a first memory chip connected to the external connectors through the substrate;
- and
- a second memory chip connected to the external connectors through the substrate.
Dependencies are inferred from the claim text.