Notched Gate Structure Fabrication

A method, comprising:

• providing a structure having a semiconductor substrate and semiconductor fins protruding from the semiconductor substrate in a first region and a second region;
• forming a gate material layer over the semiconductor fins;
• etching the gate material layer with a first etchant, thereby forming a first gate stack in the first region and a second gate stack in the second region;
• and
• etching the first and second gate stacks with a second etchant, the second etchant having different concentrations in the first and second regions, thereby forming the first and second gate stacks with bottom portions narrower than top portions.

A method of semiconductor device fabrication, comprising:

• providing a semiconductor wafer;
• forming a first plurality of fins in a center region of the semiconductor wafer and a second plurality of fins in an edge region of the semiconductor wafer;
• forming a dielectric layer over the first and second pluralities of fins;
• patterning the dielectric layer, thereby forming a first plurality of dummy gates on the first plurality of fins and a second plurality of dummy gates on the second plurality of fins;
• performing a dry etching process to the first and second pluralities of dummy gates by applying different etchant flow rates to the center and edge regions, thereby forming the first and second pluralities of dummy gates with bottom portions narrower than top portions;
• and
• replacing the first and second pluralities of dummy gates with respective first and second pluralities of metal gates, wherein the first and second pluralities of metal gates have bottom portions narrower than top portions.