Semiconductor Structure with Material Modification and Low Resistance Plug

A method of fabricating an integrated circuit (IC) structure, comprising:

• forming a trench in a dielectric layer on a substrate, a conductive feature being exposed within the trench;
• performing an ion implantation process to introduce a doping species to sidewalls of the dielectric layer within the trench, thereby forming a barrier layer having a thickness greater than 2 nm and a doping concentration greater than 10% (atomic percentage) to effectively prevent inter-diffusion;
• and
• performing a bottom-up deposition to fill the trench with a metal material, wherein the barrier layer has a modified surface characteristic to boost the bottom-up deposition.

An integrated circuit (IC) structure, comprising:

• a semiconductor substrate;
• a dielectric layer on the semiconductor substrate, the dielectric layer including a trench having a modified sidewall surface of the dielectric layer implanted by a doping species, the modified sidewall surface having a thickness greater than 2 nm and a doping concentration greater than 10% (atomic percentage);
• and
• a metal plug in the trench, the metal plug contacting the modified sidewall surface and landing on a conductive feature.