Cache-based trace replay breakpoints using reserved tag field bits

A computer system, comprising:

• one or more processors;
• and
• one or more computer-readable media having stored thereon computer-executable instructions that configure the one or more processors to perform breakpoint detection via a cache, including at least:
• detecting an occurrence of a memory access;
• and
• based at least on detecting the occurrence of the memory access, identifying whether any cache line of the cache matches an address associated with the memory access, and
• when a cache line does match the address associated with the memory access, determining that no breakpoint was encountered;
• or
• when no cache line matches the address associated with the memory access, identifying whether any cache line matches the address associated with the memory access when one or more flag bits are ignored, and
• when a cache line does match the address associated with the memory access when the one or more flag bits are ignored, performing a check for whether a breakpoint was encountered;
• or
• when no cache line matches the address associated with the memory access when the one or more flag bits are ignored, processing a cache miss.