Grown defect detection and mitigation using ecc in memory systems
AssigneeWestern Digital Technologies, Inc.
InventorsRan Zamir, Eran Sharon, Idan Alrod
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AssigneeWestern Digital Technologies, Inc.
InventorsRan Zamir, Eran Sharon, Idan Alrod
Estimating the term…
A controller may detect unreliable bits of data, memory cells, or bit lines during an error correction process of a read operation based on an error correction code used to generate parity bits for the data. In some embodiments, the controller may use the error correction code to determine a distribution of unsatisfied checks. Based on the distribution, the controller may detect group(s) of bits that more closely resemble a defective group of bits rather than a non-defective group of bits. Based on the detection, the controller may set reliability metrics to values that indicate low levels or reliability, which in turn may increase the probability of successfully correcting the errors and reduce the amount of work the controller needs to do in order to complete the error correction process.
A circuit comprising:
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A system comprising:
A method comprising:
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Dependencies are inferred from the claim text.