Semiconductor apparatus, operation method thereof, and stacked memory apparatus having the same

A stacked memory apparatus comprising:

• a base die;
• and
• a plurality of core dies disposed over the base die and stacked through a plurality of through electrodes,
• wherein at least one of the plurality of core dies comprises a storage device, the storage device including a data area and a code area and storing program codes provided from a host device in the code area, and
• is wherein the base die comprises:
• a plurality of unit processors, each of the plurality of unit processors including an internal memory;
• and
• a main control component configured to receive an operation policy, which includes a processor ID, a code ID, and a code address, from the host device and to control the plurality of unit processors based on the operation policy, and
• wherein the processor ID is an identifier for each of the plurality of unit processors, the code ID is an identifier for each of the program codes, and the code address indicates a position of the code area where each of the program codes is stored.