Array substrate, display panel and display device

An array substrate comprising:

• a display region;
• and
• a non-display region, comprising:
• a plurality of alignment wires comprising a high potential alignment wire and a low potential alignment wire;
• a plurality of alignment pads comprising a high potential pad and a low potential pad;
• wherein each alignment pad is electrically connected to a corresponding alignment wire, and the high potential alignment wire is electrically connected to the high potential pad and the low potential alignment wire is electrically connected to the low potential pad, the high potential alignment wire is disposed on a first side of the plurality of alignment pads and the low potential alignment wire is disposed on a second side of the plurality of alignment pads;
• and the high potential alignment wire has a first orthogonal projection on the plurality of alignment pads, the low potential alignment wire has a second orthogonal projection on the plurality of alignment pads, and the first orthogonal projection and the second orthogonal projection do not overlap with each other;
• and when a number of the high potential alignment wires is smaller than a number of the low potential alignment wires, the high potential alignment wire is disposed farther from the display region than where the low potential alignment wire is disposed;
• and when the number of the high potential alignment wires is greater than the number of the low potential alignment wires, the high potential alignment wire is disposed closer to the display region than where the low potential alignment wire is disposed.