Display device

A display device, comprising:

• a gate line;
• a semiconductor pattern disposed on the gate line;
• a data line insulated from the gate line, the data line intersecting the gate line;
• a voltage division reference line insulated from the gate line, the voltage division reference line intersecting the semiconductor pattern;
• a first electrode line, a second electrode line, a third electrode line, and a fourth electrode line sequentially arranged along a first direction and respectively intersect the semiconductor pattern;
• a first switching element comprising:
• a first source electrode electrically connected to the data line, the first electrode line, and the third electrode line;
• a first drain electrode electrically connected to the second electrode line;
• and
• a first gate electrode electrically connected to the gate line;
• a second switching element comprising:
• a second source electrode electrically connected to the data line and the third electrode line,
• a second drain electrode electrically connected to the fourth electrode line, and
• a second gate electrode electrically connected to the gate line;
• a third switching element comprising:
• a third source electrode electrically connected to the fourth electrode line,
• a third drain electrode electrically connected to the voltage division reference line, and
• a third gate electrode electrically connected to the gate line;
• a first sub-pixel electrode electrically connected to the first drain electrode;
• and
• a second sub-pixel electrode electrically connected to the second drain electrode,
• wherein a width of the semiconductor pattern in a second direction between the fourth electrode line and the voltage division reference line is smaller than a width of the semiconductor pattern in a second direction between the third electrode line and the fourth electrode line, and
• wherein the second direction is perpendicular to the first direction.

A display device, comprising:

• a semiconductor pattern disposed in a pixel, the semiconductor pattern having a first width in a first direction and a second width in a second direction crossing the first direction;
• and
• a plurality of conductive patterns disposed along the second width of the semiconductor pattern and located on the same layer as one another, the plurality of conductive patterns traversing the semiconductor pattern in the first direction,
• wherein the plurality of conductive patterns comprise a first conductive pattern, a second conductive pattern, a third conductive pattern, and a fourth conductive pattern that are sequentially arranged and spaced apart from one another in the second direction, and
• wherein the first width of the semiconductor pattern in the first direction is uniform from the second conductive pattern to the fourth conductive pattern.