Fast method for implementing discrete sine transform type vii (dst 7)

A device for decoding a video sequence using a discrete sine transform (DST) type-VII transform core, comprising:

• at least one memory configured to store program code;
• at least one processor configured to read the program code and operate as instructed by the program code, the program code including:
• identifying code configured to cause the at least one processor to identify a set of tuples of transform core elements associated with an n-point DST-VII transform core;
• obtaining code configured to cause the at least one processor to obtain an input vector that includes n input values;
• and
• generating code configured to cause the at least one processor to generate an output transform coefficient vector that includes n output values by performing m multiplication operations based on the set of tuples of transform core elements, wherein m is less than n.

A non-transitory computer-readable medium storing instructions, the instructions comprising:

• one or more instructions that, when executed by one or more processors of a device, cause the one or more processors to:
• identify a set of tuples of transform core elements associated with an n-point DST-VII transform core;
• obtain an input vector that includes n input values;
• and
• generate an output transform coefficient vector that includes n output values by performing m multiplication operations based on the set of tuples of transform core elements, wherein m is less than n.