Heterogeneous flow congestion control

A network node comprising circuitry including a processor and a memory, the memory containing instructions executable by the processor whereby the network node is operative to:

• receive a first plurality of packets from a sending node;
• calculate a first average delay experienced by the packets in the first plurality;
• determine a delay variation in accordance with the calculated first average delay, wherein the delay variation indicates a trend in the average delay associated with a network path over time;
• determine a congestion metric associated with the network path in accordance with the delay variation;
• and
• transmit the congestion metric to the sending node.

A network node comprising:

• a packet receiving module for receiving a first plurality of packets from the sending node;
• a congestion estimation module for calculating a first average delay experienced by the packets in the first plurality, and for determining a delay variation in accordance with the calculated first average delay, wherein the delay variation indicates a trend in the average delay associated with the network path over time;
• and
• a rate controlling module for determining a congestion metric associated with the network path in accordance with the delay variation, and for transmitting the congestion metric to the sending node.

A computer readable storage medium storing executable instructions, which when executed by a processor, cause the processor to:

• receive a first plurality of packets from a sending node;
• calculate a first average delay experienced by the packets in the first plurality;
• determine a delay variation in accordance with the calculated first average delay, wherein the delay variation indicates a trend in the average delay associated with a network path over time;
• determine a congestion metric associated with the network path in accordance with the delay variation;
• and
• transmit the congestion metric to the sending node.