Protection of an iterative calculation

A device, comprising:

• a plurality of registers;
• and
• cryptographic circuitry, which, in operation, performs a calculation on a first number and a second number, wherein the performing the calculation includes:
• successively for each bit of the second number:
• performing a first function, with the first function using a first operator and having as inputs:
• contents of a first register, contents of a second register and the first number, and placing a result of the first function in a third register;
• performing a second function, the second function using a second operator and having as inputs:
• contents of the third register;
• and
• the contents of a selected one of the first and the second register according to a state of a current bit of the second number;
• and
• placing a result of the second function in the selected one of the first and second register.

A non-transitory computer-readable medium having contents which configure cryptographic circuitry to perform a calculation on a first number and a second number, the performing the calculation including:

• successively for each bit of the second number:
• performing a first function, the first function using a first operator and having as inputs:
• contents of a first register, contents of a second register and the first number, and placing a result of the first function in a third register;
• performing a second function, the second function using the first operator and having as inputs:
• contents of the third register;
• and
• the contents of a selected one of the first and the second register according to a state of a current bit of the second number;
• and
• placing a result of the second function in the selected one of the first and second register.