Method and device to speed-up leakage based puf generators under extreme operation conditions

A physical unclonable function (PUF) generator, comprising:

• a PUF cell array comprising a plurality of bit cells, wherein each of the plurality of bit cells comprises at least two inverters, a plurality of floating capacitors, and at least two dynamic nodes,
• wherein each of the at least two inverters comprises a first NMOS transistor and a first PMOS transistor, wherein each of the plurality of floating capacitors is coupled between a first inverter at a first dynamic node and a second inverter at a second dynamic node, wherein each of the plurality of floating capacitors comprises a second NMOS transistor, and wherein a gate terminal of the second NMOS transistor is coupled to the first dynamic node and drain, source and body terminals are coupled together to the second dynamic node.

A physical unclonable function (PUF) generator comprising:

• a PUF cell array comprising a plurality of bit cells, wherein each of the plurality of bit cells comprises at least two inverters, a plurality of floating capacitors, and at least two dynamic nodes,
• wherein each of the at least two inverters comprises a first NMOS transistor and a first PMOS transistor, wherein each of the plurality of floating capacitors is coupled between a first inverter at a first dynamic node and a second inverter at a second dynamic node, wherein each of the plurality of floating capacitors comprises a second NMOS transistor, wherein each of the plurality of floating capacitors comprises a first channel dimension, wherein the first channel dimension is greater than second channel dimensions of the first NMOS and the first PMOS transistors in the at least two inverters.