Cascaded integrator-comb (cic) decimation filter with integration reset to support a reduced number of differentiators
AssigneeSTMicroelectronics International N.V.
InventorsAnkur BAL, Vikram SINGH, Harvinder SINGH
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Abstract
A cascaded integrator-comb (CIC) decimation filter includes N integrator stages, N−1 differentiator stages, and a decimator coupled to receive an integrated signal that is output from the N integrator stage and generate a decimated signal that is input to the N−1 differentiator stages. The decimator periodically asserts an integration reset signal. A last integrator stage of the N integrator stages is reset in response to assertion of the integration reset signal.
Claims22
A cascaded integrator-comb (CIC) decimation filter, comprising:
- N integrator stages coupled in series;
- a decimator having an input coupled to receive an integrated signal that is output from the N integrator stages coupled in series;
- N−1 differentiator stages coupled in series and configured to receive a decimated signal that is output from the decimator;
- wherein the N integrator stages coupled in series include a last integrator stage in the series having an output generating the integrated signal;
- and
- wherein the last integrator stage is controlled to be periodically reset.
A cascaded integrator-comb (CIC) decimation filter, comprising:
- N integrator stages coupled in series;
- a decimator having an input coupled to receive an integrated signal that is output from the N integrator stages coupled in series and configured to periodically output samples of a decimated signal and periodically assert an integration reset signal;
- and
- N−1 differentiator stages coupled in series and configured to receive the decimated signal that is output from the decimator;
- wherein the integration reset signal is applied to a last integrator stage of said N integrator stages coupled in series to cause a feedback delay element of the last integrator stage to be reset to zero.
A method, comprising:
- integrating samples of an input digital signal to generate an integration signal;
- decimating samples of the integration signal to generate a decimation signal;
- differentiating samples of the decimation signal;
- and
- periodically resetting the integration signal.
Dependencies are inferred from the claim text.