Pulse blanking in an amplifier
AssigneeTexas Instruments Incorporated
InventorMohit CHAWLA
Life of this patent
Estimating the term…
Abstract
A circuit includes a comparator to compare an analog signal to a ramp signal to generate a pulse width modulated output signal and a driver to generate control signals for a plurality of power transistors. A pulse blanking circuit receives the pulse width modulated output signal. For each pulse of the pulse width modulated output signal, the pulse blanking circuit, responsive to a width of the pulse being greater than a threshold, passes the pulse to the driver. Responsive to the width of the pulse being less than the threshold, the pulse blanking circuit prevents the pulse from being passed to the driver.
Claims20
A circuit, comprising:
- a comparator to compare an analog signal to a ramp signal to generate a pulse width modulated output signal;
- a driver to generate control signals for a plurality of power transistors;
- and
- a pulse blanking circuit to receive the pulse width modulated output signal, and for each pulse of the pulse width modulated output signal:
- responsive to a width of the pulse being greater than a threshold, the pulse blanking circuit is to pass the pulse to the driver;
- and
- responsive to the width of the pulse being less than the threshold, the pulse blanking circuit is to prevent the pulse from being passed to the driver.
A circuit, comprising:
- a first delay element coupled to receive an input pulse, the input pulse having a width;
- a first logic gate including first and second inputs, the first input coupled to an output of the first delay element and the second input coupled to receive the input pulse;
- a second delay element coupled to an output of the first logic gate;
- and
- a second logic gate including third and fourth inputs, the third input coupled to an output of the second delay element and the fourth input coupled to the output of the first logic gate.
A circuit, comprising:
- a comparator to compare an analog signal to a ramp signal to generate a pulse width modulated output signal;
- a driver to generate control signals for a plurality of power transistors;
- and
- a pulse blanking circuit to receive the pulse width modulated output signal, and responsive to each pulse of the pulse width modulated output signal that is less than a threshold, the pulse blanking circuit is to prevent the pulse from being passed to the driver.
Dependencies are inferred from the claim text.