Semiconductor integrated circuit device including an electro-static discharge protection circuit

A semiconductor integrated circuit device comprising:

• an electrostatic discharge (ESD) protection circuit, wherein the ESD protection circuit is turned-off when a normal voltage is applied from a pad, and the ESD protection circuit is driven by a voltage above and below the normal voltage, the ESD protection circuit comprising:
• a GPPMOS transistor connected to the pad;
• a plurality of GPPMOS transistors serially connected between the GPPMOS transistor and a ground terminal;
• and.
• a signal transmission path directly connected between any one of connection nodes between the serially connected GPPMOS transistors and the ground terminal.

A semiconductor integrated circuit device comprising:

• an electrostatic discharge (ESD) protection circuit, wherein the ESD protection circuit comprises a GPPMOS transistor connected to a pad to form a first voltage protection circuit, and a plurality of GPPMOS transistors serially connected between the first voltage protection circuit and a ground terminal, each of the GPPMOS transistors in the first and second voltage protection circuits comprising:
• a p-type semiconductor substrate;
• a plurality of n-wells formed in the p-type semiconductor substrate, the n-wells directly connected to the p-type semiconductor substrate;
• a plurality of gates formed in the n-wells;
• a source and a drain formed in the n-wells at both sides of each of the gates, the source and the drain including high concentration p-type impurities;
• and
• a common wiring for commonly connecting the gate and the source on each of the n-wells,
• wherein the GPPMOS transistor in the first voltage protection circuit and the serially connected GPPMOS transistors are integrated in the different n-wells.