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US 2019/0378935 A1Published application
Semiconductor device and method for manufacturing the same
AssigneeMitsubishi Electric Corporation
InventorsTasuku SUMINO, Takayuki HISAKA
Life of this patent
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Abstract
A gate electrode (6) is provided on the semiconductor layer (2) and a least includes a lowermost layer (6a) in contact with the semiconductor layer (2), and an upper layer (6b) provided on the lowermost layer (6a). The upper layer (6b) applies stress to the lowermost layer (6a) to cause both edges of the lowermost layer (6a) to curl up from the semiconductor layer (2).
Claims7
A semiconductor device comprising:
- a semiconductor layer;
- and
- a gate electrode provided on the semiconductor layer and a least including a lowermost layer in contact with the semiconductor layer, and an upper layer provided on the lowermost layer,
- wherein the upper layer applies thermal stress to the lowermost layer to cause both edges of the lowermost layer to curl up from the semiconductor layer,
- the lowermost layer is a Pt layer,
- the upper layer is a Ti layer, and
- a central portion of the lowermost layer is solid-phase-reacted with the semiconductor layer.
4 more elements
-3. (canceled)
A method for manufacturing a semiconductor device comprising:
- forming a gate electrode on a semiconductor layer wherein the gate electrode a least includes a lowermost layer in contact with the semiconductor layer, and an upper layer provided on the lowermost layer;
- and
- performing a heat treatment so that the upper layer applies thermal stress to the lowermost layer to cause both edges of the lowermost layer to curl up from the semiconductor layer,
- wherein the lowermost layer is a Pt layer,
- the upper layer is a Ti layer, and
- a central portion of the lowermost layer is solid-phase-reacted with the semiconductor layer by the heat treatment.
3 more elements
(canceled)
Dependencies are inferred from the claim text.