Gate-all-around structure and manufacturing method for the same

A semiconductor structure, comprising:

• a P-type transistor, comprising:
• a semiconductor fin having a top surface;
• a first SiGe nanowire over the top surface of the semiconductor fin;
• a second SiGe nanowire, an Nth SiGe nanowire, and an (N+1)th SiGe nanowire over the first SiGe nanowire, N being an integer greater than 1;
• a first space between the first SiGe nanowire and the second SiGe nanowire;
• and
• a second space between the Nth SiGe nanowire and the (N+1)th SiGe nanowire;
• wherein the first space is greater than the second space.

A semiconductor structure, comprising:

• a semiconductor fin having a top surface;
• a first nanowire over the top surface;
• an Nth nanowire over the first nanowire, N being an integer greater than 1;
• and
• an (N+1)th nanowire over the Nth nanowire, wherein a thickness of the first nanowire is substantially identical to a thickness of the Nth nanowire, a first space is between the top surface of the semiconductor fin and the first nanowire, a second space is between the Nth nanowire and the (N+1)th nanowire, the first space and the second space are filled with a doped material or a gate material.