Field Effect Transistor Contact with Reduced Contact Resistance Using Implantation Process

A structure comprising:

• a first gate structure over a substrate, the substrate comprising a first semiconductor material;
• a second semiconductor material on the substrate, the second semiconductor material being adjacent the first gate structure, the second semiconductor material being different than the first semiconductor material, the second semiconductor material comprising silicon germanium, the second semiconductor material further comprising:
• a gallium concentration that increases to a first peak concentration within 10 nm of a surface of the first semiconductor material in a direction away from a top surface of the second semiconductor material;
• and
• a p-type dopant concentration that increases within at a depth of 2 nm to 4 nm in the direction away from the top surface of the second semiconductor material;
• and
• a silicide region in the second semiconductor material.

A structure comprising:

• a first gate structure over a substrate, the substrate comprising a first semiconductor material;
• a source/drain region over the substrate adjacent the first gate structure, the source/drain region comprising a second semiconductor material, wherein the source/drain region comprises gallium dopants and p-type dopants, wherein a concentration of the gallium dopants increases along a direction toward the substrate to a first peak concentration within 10 nm of a surface of the source/drain region, wherein a concentration of the p-type dopants piles up to a second peak concentration at a depth of 2 nm to 4 nm from the surface of the source/drain region;
• a first dielectric layer over the first gate structure and the source/drain region;
• a contact extending through the first dielectric layer, the contact being electrically coupled to the source/drain region;
• and
• a silicide region interposed between the contact and the source/drain region.