Contact shape engineering for improved performance in gan rf transistors

A transistor device, comprising:

• a GaN channel;
• a source region and a drain region, wherein the source region is separated from the drain region by the GaN channel, and wherein the source region and the drain region comprise a major surface and a recessed surface;
• a gate electrode over the GaN channel;
• a source contact in contact with the major surface and the recessed surface of the source region;
• and
• a drain contact in contact with the major surface and the recessed surface of the drain region.

A transistor device, comprising:

• a GaN channel;
• a non-planar source region and a non-planar drain region, wherein the source region is separated from the drain region by the GaN channel, and wherein the source region and the drain region are disposed over and around non-planar semiconductor protrusions;
• a gate electrode over the GaN channel;
• a source contact in contact with the non-planar source region;
• and
• a drain contact in contact with the non-planar the drain region.

A computing device, comprising:

• an integrated circuit die comprising a GaN transistor, and wherein the GaN transistor comprises:
• a GaN channel;
• a source region and a drain region, wherein the source region is separated from the drain region by the GaN channel, and wherein the source region and the drain region are non-planar;
• a gate electrode over the GaN channel;
• a source contact in contact with more than one surface of the source region;
• and
• a drain contact in contact with more than one surface of the drain region.