Fin field effect transistor devices with modified spacer and gate dielectric thicknesses

A method of forming fin field effect devices, comprising:

• forming a plurality of vertical fins on a substrate;
• forming a dielectric pillar on the substrate between two adjacent vertical fins of the plurality of vertical fins, wherein at least one or the plurality of vertical fins is on a first region of the substrate, and at least one of the plurality of vertical fins is on a second region of the substrate;
• growing a bottom source/drain layer on the first region of the substrate and the second region of the substrate;
• depositing a bottom spacer layer on the bottom source/drain layer;
• depositing a filler layer on the bottom spacer layer;
• forming a cover block on the first region of the substrate;
• removing the portion of the filler layer on the second region of the substrate;
• depositing a first gate dielectric layer on the bottom spacer layer on the second region of the substrate;
• depositing a first conductive gate fill layer on the first gate dielectric layer;
• removing the cover block;
• and
• depositing a second gate dielectric layer on the filler layer on the first region of the substrate, wherein the first gate dielectric layer is about 2 nm to about 6 nm thicker than the second gate dielectric layer.

A plurality of fin field effect devices, comprising:

• at least one vertical fin on a first region of a substrate;
• at least one vertical fin on a second region of the substrate;
• a bottom spacer layer on the first region of the substrate and the second region of the substrate;
• a filler layer on the bottom spacer layer on the first region of the substrate;
• a first gate dielectric layer on the bottom spacer layer on the second region of the substrate;
• and
• a second gate dielectric layer on the filler layer on the first region of the substrate, wherein the first gate dielectric layer is about 2 nm to about 6 nm thicker than the second gate dielectric layer.