Integrating system in package (sip) with input/output (io) board for platform miniaturization

A computing system comprising:

• a processor having one or more processor cores;
• a System in Package (SiP) board, wherein the SiP board comprises a plurality of logic components, wherein the plurality of logic components comprises the processor;
• and
• an Input Output (IO) board coupled to the SiP board via a grid array,
• wherein the plurality of logic components is to be provided on both a first side and a second side of the SiP board, wherein one or more of the plurality of logic components are to be positioned in an opening in the IO board.

A computing system comprising:

• a processor having one or more processor cores;
• memory coupled to the processor to store data to be processed by the processor;
• a System in Package (SiP) board, wherein the SiP board comprises a plurality of logic components, wherein the plurality of logic components comprises the processor;
• and
• an Input Output (IO) board coupled to the SiP board via a grid array,
• wherein the plurality of logic components is to be provided on both a first side and a second side of the SiP board, wherein one or more of the plurality of logic components are to be positioned in an opening in the IO board.