Microelectronics package with vertically stacked dies

An apparatus comprising:

• a module board;
• a first thinned flip-chip die comprising a first device layer, a first through-die via, and a first package contact, wherein:
• a top portion of the first through-die via is exposed at a top of the first thinned flip-chip die;
• the first package contact is exposed at a bottom of the first thinned flip-chip die, and is coupled to the module board;
• and
• the first device layer includes a first device component, which is electrically coupled to the first through-die via and the first package contact;
• a first mold compound residing over the module board, underfilling the first thinned flip-chip die, encapsulating sides of the first thinned flip-chip die, and extending vertically beyond the first thinned flip-chip die to define a first opening within the first mold compound and vertically above the first thinned flip chip die, wherein the first mold compound does not reside over the first thinned flip chip die;
• and
• a second flip-chip die stacked with the first thinned flip chip die, residing within the first opening, and over the first thinned flip chip die, wherein:
• the second flip-chip die has a smaller plane size than the first thinned flip-chip die;
• the second flip-chip die comprises a second device layer and a second package contact, which is exposed at a bottom of the second flip-chip die, and is coupled to the first through-die via;
• and
• the second device layer includes a second device component, which is electrically coupled to the second package contact.