Pre-cut plating lines on lead frames and laminate substrates for saw singulation

A semiconductor package comprising:

• a first chip mounted on a first lead frame;
• a second chip mounted on a second lead frame;
• a bonding material that attaches a backside of the first lead frame to a backside of the second lead frame, wherein each of the first and second lead frames further comprises:
• a stack of prepreg material, a copper layer, and a solder mask;
• pre-fabricated pre-cut plating lines that are etched back on a periphery of the lead frame, wherein the etched back pre-fabricated pre-cut plating lines include an etched back opening slot on the solder mask and the copper layer, wherein the etched back opening slot exposes a top surface of the prepreg material.