Magnetic Memory Emulating Dynamic Random Access Memory (DRAM)

A magnetic memory device comprising a memory array structure that includes:

• a first memory array comprising:
• a first plurality of magnetic memory cells arranged in rows and columns;
• a first plurality of first conductive lines, each of which is coupled to a respective column of said first plurality of magnetic memory cells along a column direction;
• and
• a first plurality of second conductive lines, each of which is coupled to a respective row of said first plurality of magnetic memory cells along a row direction;
• a first multiplexer, whose input is coupled to said first plurality of first conductive lines;
• a second memory array comprising:
• a second plurality of magnetic memory cells arranged in rows and columns;
• a second plurality of first conductive lines, each of which is coupled to a respective column of said second plurality of magnetic memory cells along the column direction;
• and
• a second plurality of second conductive lines, each of which is coupled to a respective row of said second plurality of magnetic memory cells along the row direction;
• a second multiplexer, whose input is coupled to said second plurality of first conductive lines;
• a sense amplifier, whose input is connected to an output of said first multiplexer and an output of said second multiplexer;
• and
• a register connected to an output of said sense amplifier via a demultiplexer, said register including a plurality of latches that can be independently accessed,
• wherein a number of said plurality of latches corresponds to a number of said first plurality of first conductive lines or said second plurality of first conductive lines.