Efficient in-memory representation of computation graph for fast serialization and comparison

A computing device for providing a data structure associated with a computation graph having a plurality of nodes, the computing device comprising:

• a memory configured to store a set of instructions;
• and
• a processor configured to execute the set of instructions to cause the computing device to:
• allocate one or more memory blocks associated with the computation graph;
• and
• assign a plurality of memory units of the allocated one or more memory blocks, wherein each memory unit of the plurality of memory units is associated with a node of the computation graph and includes:
• a first section assigned a value corresponding to a current node of the plurality of nodes, and
• a second section assigned an offset value referencing another memory unit of the plurality of memory units, wherein the another memory unit is associated with another node coupled to the current node via an edge.

A non-transitory computer readable medium that stores a set of instructions that is executable by at least one processor of a computing device to cause the computing device to perform a method for providing a data structure associated with a computation graph having a plurality of nodes, the method comprising:

• allocating one or more memory blocks associated with the computation graph;
• and
• assigning a plurality of memory units of the allocated one or more memory blocks, wherein each memory unit of the plurality of memory units is associated with a node of the computation graph and includes:
• a first section assigned a value corresponding to a current node of the plurality of nodes, and
• a second section assigned an offset value referencing another memory unit of the plurality of memory units, wherein the another memory unit is associated with another node coupled to the current node via an edge.