Arithmetic processing device, information processing apparatus, and method for controlling arithmetic processing device
AssigneeFujitsu Limited
InventorMasakazu Tanomoto
Life of this patent
Estimating the term…
Loading patent…
AssigneeFujitsu Limited
InventorMasakazu Tanomoto
Estimating the term…
A TLB receives an access request with respect to a first address and access authorization assigned to the request from an arithmetic operation control unit, translates the first address to a second address, determines the suitability of the access authorization, and outputs the access request with respect to the first address when the access authorization is not suitable. An MMU receives the access request with respect to the first address output from the TLB, translates the first address to the second address, determines the suitability of the access authorization, and outputs a notification of access prohibition to the arithmetic operation control unit when the access authorization is not suitable.
An arithmetic processing device comprising:
An information processing apparatus comprising:
A method for controlling an arithmetic processing device that includes an arithmetic operation control device, a first access management device, and a second access management device, the method for controlling the arithmetic processing device comprising:
Dependencies are inferred from the claim text.