Arithmetic processor, information processing apparatus, and control method of arithmetic processor

An information processing apparatus, comprising:

• a main memory configured to store information and a page table;
• a request generation circuit configured to generate an information request including a request address, a translation buffer configured to associate a virtual address of a page with a physical address of the page and to store the virtual address and the physical address;
• a page-table buffer configured to associate data in a page table in a level other than a last level with a physical address of the data in the page table and to store the data in the page table and the physical address of the data in the page table;
• and
• a controller circuit configured to obtain, from the request address, a physical address of data in a page table to be accessed when a virtual address that corresponds to the request address is not stored in the translation buffer, to search in the page-table buffer for the data in the page table to be accessed when the page table to be accessed is a page table in a level other than the last level, to obtain, from the main memory, the data in the page table to be accessed when the page table to be accessed is a page table in the last level, and to register, in the translation buffer, a virtual address and a physical address of a page indicated by the obtained data.

A control method of an arithmetic processor, comprising:

• generating an information request including a request address;
• obtaining, from the request address, a physical address of data in a page table to be accessed when a virtual address that corresponds to the requested address is not stored in a translation buffer that associates a virtual address of a page with a physical address of the page and stores the virtual address and the physical address;
• searching, in a page-table buffer that associates data in a page table in a level other than a last level with a physical address of the data in a page table in a level other than the last level, for the data in the page table to be accessed when the page table to be accessed is a page table in a level other than the last level;
• and
• obtaining, from a memory, the data in the page table to be accessed when the page table to be accessed is a page table in the last level and registering, in the translation buffer, a virtual address and a physical address of a page indicated by the obtained data.