Method for performing random read access to a block of data using parallel lut read instruction in vector processors

A method of data processing according to a predetermined algorithm having at least one data access pattern, the method comprising:

• determining whether overhead of defining look up tables, moving data from memory to the look up tables and moving data to vector registers of each data access pattern is less than overhead of moving data to vector registers by plural scalar loads;
• and
• if an overhead of defining look up tables, moving data from memory to the look up tables and moving data to vector registers for a data access pattern is less than an overhead of moving data to vector registers by plural scalar loads:
• setting up plural parallel look up tables;
• moving data required by the algorithm from main memory to each of the plural parallel look up tables;
• simultaneously moving data from each of the parallel look up tables to corresponding locations of a vector destination register;
• and
• performing at least one vector single instruction multiple data (SIMD) operation upon data in the vector destination register.