Compute through power loss hardware approach for processing device having nonvolatile logic memory

An electronic device comprising:

• a central processing unit;
• a power management unit configured to detect multiple levels of available power for the central processing unit and to effect switching power on or off for the central processing unit;
• an energy storage unit connected to provide power to the electronic device and configured to hold enough energy to operate the electronic device after removal of power from the electronic device;
• a non-volatile memory;
• and
• a non-volatile memory controller configured to control the non-volatile memory and have direct access to volatile storage elements embedded in or associated with one or more of the central processing unit or one or more peripherals;
• wherein the power management unit is configured to:
• interrupt a normal processing order of the central processing unit to effect entry of the central processing unit into a low power mode in response to detecting a power loss event initiated by the power management unit due to detection of a power loss scenario or initiated by the central processing unit to save energy, the low power mode being a mode in which data stored in the volatile storage elements is transferred to the non-volatile memory and supply of power to the volatile storage elements is stopped thereafter;
• use energy stored in the energy storage device to:
• in response to entering into the low power mode, trigger the non-volatile memory controller to perform a save operation to store data stored in the volatile storage elements in the non-volatile memory, the data representing a state of the one or more of the central processing unit or one or more peripherals, and, after the data is saved in the non-volatile memory, effect switching off power to the central processing unit and the volatile storage elements;
• during the low power mode, detect restoration of power to the electronic device or a wakeup request from the central processing unit's power off state;
• and
• in response to detecting the restoration of power or the wakeup request, exit the low power mode by supplying power to the volatile storage elements and triggering the non-volatile memory controller to perform a restore operation to restore the data from the non-volatile memory to the volatile storage elements prior to execution of a wake up process for the central processing unit from the low power mode;
• wherein the power management unit is further configured to prevent a startup of the electronic device while in the low power mode unless enough energy is present on the energy storage unit to complete a round trip of a restore operation in which the low power mode is exited followed by a save operation in which the low power mode is entered again.