Electronic apparatus having package base substrate
AssigneeSamsung Electronics Co., Ltd.
InventorsJi-woon PARK, Jin-an Lee
Life of this patent
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Abstract
Provided is an electronic apparatus capable of improving time margin. The electronic apparatus includes: a base substrate including a substrate base including a plurality of layers and a plurality of wiring layers between the layers; a controller chip and at least one memory semiconductor chip mounted on the base substrate; a signal line disposed in one of the wiring layers and connecting the controller chip to the at least one memory semiconductor chip; and a pair of open stubs disposed in another wiring layer, connected to both ends of the signal line, and extending to face each other with a gap.
Claims20
An electronic apparatus comprising:
- a base substrate comprising a substrate base comprising a plurality of layers and a plurality of wiring layers disposed between the layers;
- a controller chip and at least one memory semiconductor chip mounted on the base substrate;
- at least one first signal line disposed in a first wiring layer in the substrate base from among the wiring layers and connecting the controller chip to the memory semiconductor chip;
- at least one pair of open stubs disposed in a second wiring layer in the substrate base from among the wiring layers, connected to the both ends of the first signal line, and apart from each other;
- and
- a plurality of vias penetrating through portions of the substrate base to connect both ends of the first signal line and the pair of open stubs.
An electronic apparatus comprising:
- a base substrate comprising a substrate base comprising a plurality of layers and a plurality of wiring layers disposed between the layers, wherein the layers comprise a first ground wiring layer, a second ground wiring layer, a first signal wiring layer, and a second signal wiring layer, and wherein the first signal wiring layer and the second signal wiring layer are disposed between the first ground wiring layer and the second ground wiring layer;
- and
- a plurality of semiconductor chips mounted on the base substrate,
- wherein the base substrate comprises:
- ground plane layers respectively disposed in the first ground wiring layer and the second ground wiring layer;
- a signal line disposed in the first signal wiring layer and connecting two of the semiconductor chips;
- a pair of open stubs disposed in the second signal wiring layer and connected to both ends of the signal line;
- and
- a plurality of vias penetrating a portion of the substrate base to connect both ends of the signal line and the pair of open stubs.
An electronic apparatus comprising:
- a base substrate comprising a substrate base comprising a plurality of layers and a plurality of wiring layers disposed between the layers;
- at least one semiconductor chip mounted on the base substrate;
- at least one signal line disposed in a first wiring layer among the wiring layers and connected to the at least one semiconductor chip;
- and
- a pair of open stubs disposed in at least one second wiring layer among the wiring layers, connected to both ends of the signal line, and extending to face each other across a gap.
Dependencies are inferred from the claim text.