Ultralow-power sensor hubs
AssigneeAvago Technologies International Sales Pte. Limited
InventorsAvinash AGARWAL, Mohit SHARMA
Life of this patent
Estimating the term…
Abstract
A system includes a frequency-locked loop (FLL) circuit, a sensor-hub circuit and a processor. The FLL circuit is used to generate a low-frequency clock. The sensor-hub circuit is coupled to a number of sensors and is configured to periodically poll the sensors during polling periods and to detect sensor activities. The processor is coupled to the sensor-hub circuit and can process sensor signals from one or more active sensors. The processor is off during polling periods and is turned on when a sensor activity is detected. The polling periods are based on the low-frequency clock generated by the FLL circuit.
Claims20
A system comprising:
- a frequency-locked loop (FLL) circuit configured to generate a low-frequency clock;
- a sensor-hub circuit coupled to a plurality of sensors and configured to periodically poll the plurality of sensors during polling periods and detect sensor activities;
- and
- a processor coupled to the sensor-hub circuit and configured to process sensor signals from one or more active sensors,
- wherein the processor is off during polling periods and is turned on when a sensor activity is detected, and the polling periods are based on the low-frequency clock generated by the FLL circuit.
A method of low-power management of a plurality of sensors, the method comprising:
- generating, by a FLL circuit, a low-frequency clock;
- periodically polling, by a sensor-hub circuit coupled to the plurality of sensors, during polling periods and detecting sensor activities;
- and
- processing, by a processor coupled to the sensor-hub circuit, sensor signals from one or more active sensors,
- wherein the processor is off during polling periods and is turned on when a sensor activity is detected, and the polling periods are based on the low-frequency clock generated by the FLL circuit.
A wireless communication device, the device comprising:
- a plurality of sensors;
- a sensor-hub circuit coupled to the plurality of sensors and configured to periodically poll the plurality of sensors during polling periods and to detect sensor activities;
- a processor coupled to the sensor-hub circuit and configured to process sensor signals from one or more active sensors, the processor being off during polling periods and being turned on when a sensor activity is detected;
- and
- a frequency-locked loop (FLL) circuit configured to generate a low-frequency clock,
- wherein the polling periods are based on the low-frequency clock generated by the FLL circuit.
Dependencies are inferred from the claim text.