High Efficiency Power Amplifier Architectures for RF Applications
AssigneeMY Tech, LLC
InventorsTommy Yu, Avanindra Madisetti
Life of this patent
Estimating the term…
Loading patent…
AssigneeMY Tech, LLC
InventorsTommy Yu, Avanindra Madisetti
Estimating the term…
A parallel delta sigma modulator architecture is disclosed. The parallel delta sigma modulator architecture includes a signal demultiplexer configured to receive an input signal and to demultiplex the input signal to output a plurality of streams, a plurality of delta sigma modulators executing in parallel, each delta sigma modulator configured to receive a stream from the plurality of streams and to generate a delta sigma modulated output, and a signal multiplexer configured to receive a plurality of delta sigma modulated outputs from the plurality of delta sigma modulators and to multiplex together the plurality of delta sigma modulated outputs into a pulse train.
A parallel delta sigma modulator comprising:
A switch-mode power amplifier system comprising:
Dependencies are inferred from the claim text.