I/o protected buck then boost or boost then buck converter, with interleaving option

An opposed two quadrant buck then boost circuit in an integrated circuit, said integrated circuit comprising:

• a. a first pair of terminals for connection across a bus voltage ;
• b. a second pair of terminals for connection across a storage load ;
• c. a sensing circuit and a system control circuit, said sensing circuit being responsive to a decrease of bus voltage level to produce a low voltage signal in response to the decrease of bus voltage to a voltage lower than a first, preselected bus voltage level, said sensing circuit providing the low voltage signal to said system control circuit;
• the system control circuit responding to the low voltage signal to command a boost mode;
• d. the sensing circuit being coupled to produce a buck command signal in response to a return of bus voltage to at least the first, preselected bus voltage level, the buck command signal being coupled to the system control circuit to command the buck mode;
• e. a driver circuit coupled to respond to commands from said system control circuit;
• f. a buck and boost control circuit and an inductor coupled in series in a positive rail between said first pair of terminals and said second pair of terminals, said inductor being charged to store energy in a first portion of a duty cycle and to discharge energy in a remaining portion of a duty cycle;
• g. said buck and boost control circuit comprising a buck transistor and a boost transistor, said buck transistor having a source-drain circuit in series in said positive rail and said boost transistor having a source-drain circuit in series between a terminal of said inductor and a ground terminal;
• and
• h. a gate of said buck transistor coupled for commutation by said boost transistor in a buck mode and a gate of said boost transistor coupled for commutation by said buck transistor in a boost mode.

A four quadrant buck-boost DC/DC converter in an integrated circuit, said integrated circuit comprising:

• a. a single integrated circuit comprising the buck-boost DC/DC converter;
• b. a bus terminal and an energy storage terminal respectively comprising an input terminal for bus voltage and an energy storage terminal for connection to an energy storage load;
• c. a series circuit coupled between said bus terminal and said energy storage terminal comprising a first protection transistor, a first current sensor, a duty cycle circuit, an inductor, a second current sensor, and a second protection transistor;
• d. said duty cycle circuit comprising a buck transistor and a boost transistor, a series path of said buck transistor being connected in series between said bus terminal and said inductor and a series path of said boost transistor being connected in series between said inductor and a driver circuit;
• e. said boost transistor being coupled to commutate said buck transistor in the buck mode and said buck transistor being coupled to commutate said boost transistor in the boost mode;
• f. a system control circuit responsive to bus inputs and voltages and to currents from a storage load, said control circuit providing error signals indicative of status of the DC/DC converter to command selectively the buck mode or the boost mode;
• and
• g. said driver circuit being coupled to control said buck transistor and said boost transistor in response to signals from said system control circuit.