Characterization vehicles for printed circuit board and system design

A method for evaluating a plurality of panelized printed circuit (PC) boards manufactured by a first manufacturing process, each of the panelized PC boards comprising a first and second test circuit located on separate panels of the respective panelized PC boards, wherein (i) the first test circuit is fabricated in accordance with a first plurality of design parameters, (ii) the second test circuit is fabricated in accordance with a second plurality of design parameters, (iii) the first plurality of design parameters and the second plurality of design parameters adhere to a design of experiment (DOE) concerning one or more design rules or design trade-offs such that at least two corresponding design parameters from the first and second test circuits have identical values, and at least two corresponding design parameters from the first and second test circuits have different values, (iv) the first test circuit is associated with a first test program for testing the first test circuit and the second test circuit is associated with a second test program for testing the second test circuit, (v) the first test program is specified by a first set of input-output pairs, in which each of the input-output pairs of the first set define an expected output of the first test circuit for a given input to the first test circuit, (vi) the second test program is specified by a second set of input-output pairs, in which each of the input-output pairs of the second set define an expected output of the second test circuit for a given input to the second test circuit, and (vii) the first set of input-output pairs is identical to the second set of input-output pairs, the method comprising:

• for each of the panelized PC boards, evaluating a characteristic of the first test circuit and a characteristic of the second test circuit that is identical to the characteristic of the first test circuit;
• over all of the panelized PC boards, aggregating the evaluated characteristics of first test circuits into a first summarizing value, and aggregating the evaluated characteristics of the second test circuits into a second summarizing value;
• and
• if the first summarizing value is substantially similar to the second summarizing value, determining that the first manufacturing process is insensitive to the at least two corresponding design parameters from the first and second test circuits having different values;
• otherwise, if the first summarizing value is not substantially similar to the second summarizing value, determining that the first manufacturing process is sensitive to the at least two corresponding design parameters from the first and second test circuits having different values.

A method for fabricating a characterization vehicle, the method comprising:

• fabricating a first test circuit in accordance with a first plurality of design parameters on a first panel of a panelized printed circuit (PC) board;
• and
• fabricating a second test circuit in accordance with a second plurality of design parameters on a second panel of the panelized PC board,
• wherein (i) the first plurality of design parameters and the second plurality of design parameters adhere to a design of experiment (DOE) concerning one or more design rules or design trade-offs such that at least two corresponding design parameters from the first and second test circuits have identical values, and at least two corresponding design parameters from the first and second test circuits have different values, (ii) the first test circuit is associated with a first test program for testing the first test circuit and the second test circuit is associated with a second test program for testing the second test circuit, (iii) the first test program is specified by a first set of input-output pairs, in which each of the input-output pairs of the first set define an expected output of the first test circuit for a given input to the first test circuit, (iv) the second test program is specified by a second set of input-output pairs, in which each of the input-output pairs of the second set define an expected output of the second test circuit for a given input to the second test circuit, and (v) the first set of input-output pairs is identical to the second set of input-output pairs.