Switched-Mode Power Supply
AssigneeSTMicroelectronics (Alps) SAS
InventorPatrik Arno
Life of this patent
Estimating the term…
Abstract
In an embodiment, an SMPS comprises a half-bridge, and a driver configured to drive the half-bridge based on a PWM signal. The SMPS further comprising a first circuit coupled between the output of the driver and a control terminal of a high-side transistor of the half-bridge, wherein the first circuit is configured to maintain the first transistor on when the PWM signal has a duty cycle that is substantially 100%.
Claims25
A switched-mode power supply comprising:
- a half-bridge comprising:
- an output node,
- a first transistor coupled between a first terminal and the output node, and
- a second transistor coupled between the output node and a second terminal, the first terminal configured to receive a first voltage, and the second terminal configured to receive a second voltage lower than the first voltage;
- a controller comprising a driver configured to receive a pulse-width modulation (PWM) signal, the driver having an output coupled to a control terminal of the first transistor, the driver configured to cause the first transistor to turn on for a time that is proportional to a duty cycle of the PWM signal;
- and
- a first circuit coupled between the output of the driver and the control terminal of the first transistor, wherein the first circuit is configured to maintain the first transistor on when the duty cycle of the PWM signal is substantially 100%.
A method of operating a switched-mode power supply, the method comprising:
- receiving a power supply voltage at a supply terminal;
- receiving a clock signal having a first frequency;
- receiving a pulse-width modulation (PWM) signal having the first frequency;
- operating the switched-mode power supply in a first mode, wherein the first mode comprises generating an output voltage at an output of the switched-mode power supply based on the PWM signal, wherein the output voltage is different than the power supply voltage;
- adjusting a resistance value of a feedback network of the switched-mode power supply;
- after adjusting the resistance value, counting a number of consecutive cycles of the clock signal in which the PWM signal does not switch;
- when the number of consecutive cycles of the clock signal in which the PWM signal does not switch reaches a first threshold, turning on a first transistor to cause the power supply voltage to be delivered to the output of the switched-mode power supply to operate the switched-mode power supply in a second mode;
- and
- stop switching the switched-mode power supply when operating the switched-mode power supply in the second mode.
A switched-mode power supply comprising:
- a half-bridge comprising:
- an output node,
- a first transistor coupled between a first terminal and the output node, and
- a second transistor coupled between the output node and a second terminal, the first terminal configured to receive a first voltage, and the second terminal configured to receive a second voltage lower than the first voltage;
- a controller comprising a first input configured to receive a periodic signal having a first frequency, and a driver having an input configured to receive a pulse-width modulation (PWM) signal having the first frequency, the driver having a first output coupled to a control terminal of the first transistor and a second output coupled to a control terminal of the second transistor, the driver configured to generate a first signal in the first output of the driver and a second signal in the second output of the driver based on the PWM signal;
- a first circuit having a first input coupled to the first output of the driver and an output coupled to the control terminal of the first transistor;
- and
- a second circuit comprising a counter having a first input configured to receive a clock signal having the first frequency, a reset input coupled the input of the driver, and an output configured to generate a count of the counter, wherein the first circuit is configured to turn on the first transistor and maintain on the first transistor when the count of the counter reaches a first threshold.
A buck converter comprising a resistive feedback loop having an adjustable value, wherein the feedback loop comprises first and second states, the second state being capable of making the feedback voltage greater than or equal to a power supply voltage.
A boost converter comprising a resistive feedback loop having an adjustable value, wherein the feedback loop comprises first and second states, the second state being capable of making the feedback voltage smaller than or equal to a power supply voltage.
Dependencies are inferred from the claim text.