Nonvolatile charge trap memory device having a deuterated layer in a multi-layer charge-trapping region

A charge trap memory device comprising:

• a vertical channel formed from a projection of semiconducting material extending from a first diffusion region formed on a surface on a substrate to a second diffusion region formed over the surface of the substrate, the vertical channel electrically connecting the first diffusion region to the second diffusion region;
• a tunnel dielectric layer abutting the vertical channel;
• a multi-layer charge-trapping region including a first deuterated layer abutting the tunnel dielectric layer, a first nitride layer comprising an oxygen-rich nitride abutting the first deuterated layer, and a second nitride layer comprising a silicon-rich, oxygen-lean nitride overlying the first nitride layer.