Bit line gate and manufacturing method thereof
AssigneesUnited Microelectronics Corp., Fujian Jinhua Integrated Circuit Co., Ltd.
InventorsPin-Hong Chen, Yi-Wei Chen, Chun-Chieh Chiu, Chih-Chieh Tsai, Tzu-Chieh Chen, Chih-Chien Liu
Life of this patent
Estimating the term…
Abstract
The present invention provides a bit line gate structure comprising a substrate, an amorphous silicon layer disposed on the substrate, a first doped region located in the amorphous silicon layer, a titanium silicon nitride (TiSiN) layer, located in the amorphous silicon layer, and a second doped region located in the TiSiN layer, the first doped region contacts the second doped region directly.
Claims9
1-7. (canceled)
A method for forming a bit line gate structure, comprising:
- providing a substrate;
- forming an amorphous silicon layer on the substrate;
- performing an ion doping step to form a first doped region in the amorphous silicon layer, wherein an oxide layer is formed on the surface of the amorphous silicon layer after the ion doping step is performed;
- performing an etching step to completely remove the oxide layer;
- forming a titanium silicon nitride (TiSiN) layer on the amorphous silicon layer;
- and
- performing a rapid thermal process (RTP) to diffuse the first doped region into the TiSiN layer, and to form a second doped region within the TiSiN layer.
14-15. (canceled)
Dependencies are inferred from the claim text.