Self-aligned single diffusion break for fully depleted silicon-on-insulator and method for producing the same

A device comprising:

• a buried oxide (BOX) layer over a silicon (Si) substrate;
• a silicon-on-insulator (SOI) layer over a portion of the BOX layer;
• a pair of gates over the SOI layer and laterally separated, each gate including a gate oxide layer over the SOI layer, a gate electrode layer over the gate oxide layer, an amorphous Si layer over the gate electrode layer, and a pair of first sidewall spacers;
• and
• a dummy gate over a portion of the BOX layer with a u-shaped spacer liner and a spacer structure between a pair of second sidewall spacers, the dummy gate laterally separated from and situated in-between the pair of gates.

A method comprising:

• providing a plurality of gates over a silicon-on-insulator (SOI) layer above a buried oxide (BOX) layer over a silicon (Si) substrate, each gate including a gate oxide layer over the SOI layer, a gate electrode layer over the gate oxide layer, an amorphous Si layer over the gate electrode layer, a pair of sidewall spacers and a cap layer, and a raised source/drain (S/D) epitaxial regions over the SOI layer between each gate;
• removing a gate of the plurality of gates and a portion of the SOI layer exposed by the removing of the gate, and a portion of the BOX layer underneath the SOI layer by a selective etch process, the removing forms a trench;
• forming a liner of an oxide over and along sidewalls of the trench;
• and
• filling the trench with a second dielectric material.