Wafer-level inspection using on-valve inspection detectors

A wafer-level inspection system comprising:

• a transfer mechanism configured to automatically transfer a semiconductor wafer through a transfer port of a processing chamber;
• at least one on-valve inspection detector arranged on a vacuum valve, providing access through the transfer port of the processing chamber, wherein the at least one on-valve inspection detector is configured to scan a surface of the semiconductor wafer and generates a plurality of line images;
• and
• at least one processor configured to detect defects on the surface of the semiconductor wafer according to a set of predefined criteria.

A wafer-level inspection system comprising:

• a processing chamber for performing a semiconductor manufacturing process;
• a vacuum valve for providing access through a transfer port of the processing chamber;
• a transfer mechanism configured to automatically transport a semiconductor wafer through the transfer port of the processing chamber;
• at least one on-valve inspection detector arranged on the vacuum valve to scan a surface of the semiconductor wafer;
• and
• at least one processor configured to detect defects on the surface of the semiconductor wafer according to a set of predefined criteria.