Cut Metal Gate Process for Reducing Transistor Spacing

A semiconductor structure, comprising:

• a substrate;
• first and second fins extending from the substrate and oriented lengthwise generally along a first direction;
• an isolation feature over the substrate and between bottom portions of the first and the second fins;
• first and second epitaxial semiconductor features over the first and the second fins, respectively;
• and
• a first dielectric feature between and in contact with the first and the second epitaxial semiconductor features, wherein a first sidewall of the first dielectric feature extends from the isolation feature to a point above the first epitaxial semiconductor feature.

A semiconductor structure, comprising:

• a substrate;
• first and second fins extending from the substrate;
• an isolation feature over the substrate and between bottom portions of the first and the second fins;
• first and second epitaxial semiconductor features over the first and the second fins, respectively;
• and
• a first dielectric feature between the first and the second epitaxial semiconductor features, wherein a middle portion of the first dielectric feature contacts the first and the second epitaxial semiconductor features, and a lower portion of the first dielectric feature below the middle portion is spaced from the first and the second epitaxial semiconductor features.