Column multiplexor decoding
AssigneeGlobalfoundries Inc.
InventorWuyang HAO
Life of this patent
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Abstract
The present disclosure relates to a structure including a column multiplexor circuit with a plurality of bit line groups to perform a read operation of data using half of a plurality of column selection signals in the column multiplexor circuit, and each of the bit line groups comprises a reference bit line column, a plurality of transistors, and a plurality of bit lines.
Claims16
A structure comprising a column multiplexor circuit which comprises a plurality of bit line groups to perform a read operation of data using half of a plurality of column selection signals included in the column multiplexor circuit, and each of the bit line groups comprises a plurality of bit lines and a reference bit line column connected to a plurality of transistors,
- wherein the plurality of bit line groups comprises a first bit line group, a second bit line group, a third bit line group, and a fourth bit line group, and
- the reference bit line column of the third bit line group is an unused multiplexor output.
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A method, comprising:
- inputting data to a first reference bit line column included in a first bit line group in a column multiplexor circuit;
- selecting a second reference bit line column included in a second bit line group in the column multiplexor circuit as a first reference bit line signal;
- selecting a third reference bit line column included in a third bit line group in the column multiplexor circuit as an unused multiplexor output;
- selecting a fourth reference bit line column included in a fourth bit line group in the column multiplexor circuit as a second reference bit line signal;
- and
- performing a read operation of the data on the first reference bit line column in the column multiplexor circuit.
Dependencies are inferred from the claim text.