Input/output multiplexer

An input/output multiplexer coupled to a memory array through a plurality of bit lines, the memory array comprising a plurality of memory cells, and the input/output multiplexer comprising:

• a bit-line amplifier, coupled to a first bit line and a second bit line among the plurality of bit lines, operating under a high supply voltage and a low supply voltage to amplify a voltage difference between a voltage level of the first bit line and a voltage level of the second bit line in a read mode, wherein in a first selection period of the read mode, according to the amplified voltage difference, a voltage level of a first local-data terminal of the bit-line amplifier is initially at an initial level, and a voltage level of a second local-data terminal of the bit-line amplifier decreases from the initial level toward a level of the low supply voltage;
• a level-raising circuit, coupled to the first local-data terminal and the second local-data terminal, raising the voltage level of the first local-data terminal from the initial level in the first selection period;
• and
• a sensing amplifier, coupled to the first local-data terminal and the second local-data terminal, generating first readout data corresponding to the first bit line and second readout data corresponding to the second bit line according to the raised voltage level of the first local-data terminal and the voltage level of the second local-data terminal.