Method and system for hardware mapping inference pipelines
AssigneeAdvanced Micro Devices, Inc.
InventorShuai Che
Life of this patent
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AssigneeAdvanced Micro Devices, Inc.
InventorShuai Che
Estimating the term…
Methods and systems for hardware mapping inference pipelines in deep neural network (DNN) systems. Each layer of the inference pipeline is mapped to a queue, which in turn is associated with one or more processing elements. Each queue has multiple elements, where an element represents the task to be completed for a given input. Each input is associated with a queue packet which identifies, for example, a type of DNN layer, which DNN layer to use, a next DNN layer to use and a data pointer. A queue packet is written into the element of a queue, and the processing elements read the element and process the input based on the information in the queue packet. The processing element then writes another queue packet to another queue based on the processed queue packet. Multiple inputs can be processed in parallel and on-the-fly using the queues independent of layer starting points.
A deep neural network (DNN) system, comprising:
A method for deep neural network (DNN) processing, the method comprising:
Dependencies are inferred from the claim text.