Countermeasures against hardware side-channel attacks on cryptographic operations

One or more non-transitory computer-readable storage mediums having stored thereon executable computer program instructions that, when executed by one or more processors, cause the one or more processors to perform operations comprising:

• commencing operation of a system, the system including a crypto block including a plurality of crypto cores and an active SNR (Signal to Noise Ratio) reduction circuit coupled with the crypto block;
• and
• upon determining that a first crypto core of the plurality of crypto cores is to be turned on or off, switching a first current source block of a plurality of current source blocks of the active SNR reduction circuit, the first current source block to be switched on if the first crypto core is to be turned on and the first current source block to be switched off if the first crypto core is to be turned off.