Address Map Caching for a Memory System

A method, comprising:

• storing, in non-volatile media of a memory system having a quantity of memory units. an address map, the address map defining logical addresses in terms of physical addresses of the memory units in the non-volatile media;
• loading, by a cache manager of the memory system, a first portion of the address map in a volatile memory of the memory system;
• processing, by a controller of the memory system, requests from a host system to store data in the non-volatile media or retrieve data from the non-volatile media, the host system having a memory connected to the memory system via a communication channel;
• loading, by the cache manager, a second portion of the address map in the memory of the host system;
• and
• in response to an operation that uses a logical address defined in the second portion, retrieving the second portion of the address map from the memory of the host system through the communication channel to the volatile memory of the memory system.

A non-transitory computer storage medium storing instructions which, when executed by a memory system having non-volatile media, a volatile memory, and a controller, cause the memory system to perform a method, the method comprising:

• storing, in the non-volatile media having a quantity of memory units. an address map, the address map defining logical addresses in terms of physical addresses of the memory units in the non-volatile media;
• loading a first portion of the address map in a volatile memory of the memory system;
• loading a second portion of the address map in the memory of the host system;
• processing requests from a host system to store data in the non-volatile media or retrieve data from the non-volatile media, the host system having a memory connected to the memory system via a communication channel;
• and
• in response to an operation that uses a logical address defined in the second portion, swapping through the communication channel the first portion of the address map and the second portion of the address map between the memory of the host system and the volatile memory of the memory system.