Apparatuses for integrating arithmetic with logic operations
AssigneeVia Alliance Semiconductor Co., Ltd.
InventorsHuaisheng ZHANG, Dacheng LIANG, Boming CHEN, Renyu BIAN
Life of this patent
Estimating the term…
Loading patent…
AssigneeVia Alliance Semiconductor Co., Ltd.
InventorsHuaisheng ZHANG, Dacheng LIANG, Boming CHEN, Renyu BIAN
Estimating the term…
An apparatus integrates arithmetic with logic operations. The apparatus includes a calculation device that calculates source data to generate and output first destination data. The apparatus further includes a normalization unit, coupled to the calculation device, that normalizes the first destination data to generate second destination data of a first type when receiving a signal indicating an output of first-type data, and normalizing the first destination data to generate the second destination data of a second type when receiving the signal indicating an output of second-type data.
An apparatus for integrating arithmetic with logic operations, comprising:
Dependencies are inferred from the claim text.